Design Overview for SandwichTop

PropertyValue
Project Name:c:\cms\firmware\luminosity\sandwich\v15
Target Device:xc2vp7
Report Generated:Friday 11/11/05 at 11:59
Printable Summary (View as HTML)SandwichTop_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Total Number Slice Registers:2,2939,85623% 
Number used as Flip Flops:2,208   
Number used as Latches:85   
Number of 4 input LUTs:2,6579,85626% 
Logic Distribution:    
Number of occupied Slices:2,3854,92848% 
Number of Slices containing only related logic:2,3852,385100% 
Number of Slices containing unrelated logic:02,3850% 
Total Number 4 input LUTs:3,3179,85633% 
Number used as logic:2,657   
Number used as a route-thru:660   
Number of bonded IOBs:16324865% 
Number of PPC405s:010% 
Number of Block RAMs:234452% 
Number of GCLKs:61637% 
Number of DCMs:1425% 
Number of GTs:080% 
Number of GT10s:000% 

Performance Summary

PropertyValue
Final Timing Score:0
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
All Constraints Met   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentFriday 11/11/05 at 11:56
Translation ReportCurrentFriday 11/11/05 at 11:56
Map ReportCurrentFriday 11/11/05 at 11:57
Pad ReportCurrentFriday 11/11/05 at 11:58
Place and Route ReportCurrentFriday 11/11/05 at 11:58
Post Place and Route Static Timing ReportCurrentFriday 11/11/05 at 11:58
Bitgen ReportCurrentFriday 11/11/05 at 11:59