Design Overview for SandwichTop

PropertyValue
Project Name:c:\cms\firmware\luminosity\sandwich\v13
Target Device:xc2vp7
Report Generated:Thursday 08/25/05 at 15:03
Printable Summary (View as HTML)SandwichTop_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops:2,0169,85620% 
Number of 4 input LUTs:1,8949,85619% 
Logic Distribution:    
Number of occupied Slices:1,9684,92839% 
Number of Slices containing only related logic:1,9681,968100% 
Number of Slices containing unrelated logic:01,9680% 
Total Number 4 input LUTs:2,4569,85624% 
Number used as logic:1,894   
Number used as a route-thru:562   
Number of bonded IOBs:16324865% 
Number of PPC405s:010% 
Number of Block RAMs:194443% 
Number of GCLKs:51631% 
Number of DCMs:1425% 
Number of GTs:080% 
Number of GT10s:000% 

Performance Summary

PropertyValue
Final Timing Score:0
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
All Constraints Met   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentThursday 08/25/05 at 15:00
Translation ReportCurrentThursday 08/25/05 at 15:00
Map ReportCurrentThursday 08/25/05 at 15:01
Pad ReportCurrentThursday 08/25/05 at 15:01
Place and Route ReportCurrentThursday 08/25/05 at 15:02
Post Place and Route Static Timing ReportCurrentThursday 08/25/05 at 15:02
Bitgen ReportCurrentThursday 08/25/05 at 15:03