Design Overview for SandwichTop

PropertyValue
Project Name:c:\cms\firmware\luminosity\sandwich\v5
Target Device:xc2vp7
Report Generated:Tuesday 08/02/05 at 17:07
Printable Summary (View as HTML)SandwichTop_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops:5899,8565% 
Number of 4 input LUTs:5049,8565% 
Logic Distribution:    
Number of occupied Slices:5234,92810% 
Number of Slices containing only related logic:523523100% 
Number of Slices containing unrelated logic:05230% 
Total Number 4 input LUTs:8469,8568% 
Number used as logic:504   
Number used as a route-thru:342   
Number of bonded IOBs:16524866% 
Number of PPC405s:010% 
Number of Block RAMs:2444% 
Number of GCLKs:31618% 
Number of DCMs:1425% 
Number of GTs:080% 
Number of GT10s:000% 

Performance Summary

PropertyValue
Final Timing Score:0
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
All Constraints Met   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentTuesday 08/02/05 at 17:05
Translation ReportCurrentTuesday 08/02/05 at 17:05
Map ReportCurrentTuesday 08/02/05 at 17:05
Pad ReportCurrentTuesday 08/02/05 at 17:06
Place and Route ReportCurrentTuesday 08/02/05 at 17:06
Post Place and Route Static Timing ReportCurrentTuesday 08/02/05 at 17:06
Bitgen ReportCurrentTuesday 08/02/05 at 17:07